1. Field of the Invention
The present technology relates to a semiconductor apparatus including a plurality of semiconductor parts.
2. Description of the Related Art
In a photoelectric conversion apparatus such as a complementary metal-oxide semiconductor (CMOS) image sensor which is a type of semiconductor apparatus, a photoelectric conversion unit having a plurality of photoelectric conversion elements and a signal processing unit that processes an electric signal from the photoelectric conversion unit are built onto a single semiconductor substrate in a monolithic manner. A structure is being studied in which the photoelectric conversion unit and the signal processing unit are formed on individual parts (chips), the parts are stacked on each other, and the parts are electrically connected with each other through a conductive member. Accordingly, an occupied area (a footprint) of the photoelectric conversion apparatus in electronic equipment on which the photoelectric conversion apparatus is mounted can be efficiently utilized. The conductive member is provided to obtain the electrical connection between the parts. Such a structure may be applied to any of various semiconductor apparatuses that realize so-called system-in packages.
Japanese Patent Laid-Open No. 2011-096851 describes that inter-substrate wiring (68) is provided as the conductive member for obtaining the electrical connection between semiconductor substrates (31, 45) corresponding to the parts. In Japanese Patent Laid-Open No. 2011-096851, the inter-substrate wiring is formed as follows. First, a first groove (64) is formed, and a second groove (65) is formed by making an opening in a bottom region of the first groove (64) to a depth immediately in front of aluminum wiring (57). Then, a third groove (66) is formed by making an opening to a depth immediately in front of copper wiring (40). Then, the bottom of the second groove and the bottom of the third groove are further removed by etching, so that the aluminum wiring and the copper wiring are exposed.
With the forming method of the inter-substrate wiring described in Japanese Patent Laid-Open No. 2011-096851, when the openings are made in the second groove and the third groove to the depths immediately in front of the aluminum wiring and the copper wiring, a difference may be generated between the thickness of a remaining insulator to the aluminum wiring and the thickness of a remaining insulator to the copper wiring. The difference may cause a connection failure to be generated due to insufficient etching of the insulators, and damage and metal contamination on the wiring to be generated due to excessive etching of the conductors (the wiring) when the bottoms of the second and third grooves are etched. This technology addresses the problems and increases reliability of electrical connection by a conductive member.